# Qector Hardware Engineer

> Physical-layer quantum circuits, detector-error-model preparation, qLDPC reasoning, and honest target-device hardware reporting for QECTOR. The bundled library MCP server is app-free; the companion bench server adds DEM inspection, DEM collapse, code-family introspection, and hardware probes (all Provisional). Optional Stim, GPU, and Workbench surfaces require separate dependency and API checks. Load for circuit-to-decode workflows, target-device reporting, and any question that involves a real QPU.

- Skill: `guillaumelessard/qector-hardware-engineer` (Agent Skill)
- Install (CLI): `npx skillmds@latest add guillaumelessard/qector-hardware-engineer`
- Raw SKILL.md: https://api.skillmd.com/api/skills/guillaumelessard/qector-hardware-engineer/raw
- Safety review: pending
- Works with: Claude Code, Claude.ai, OpenAI Codex
- Category: AI & ML
- Author: GuillaumeLessard (https://skillmd.com/u/guillaumelessard)
- Updated: 2026-09-17
- Page: https://skillmd.com/skills/guillaumelessard/qector-hardware-engineer

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# QECTOR Hardware Engineer

Translate physical circuit noise into objects QECTOR can decode
without overstating the target hardware. Strict math applies
(`qector-math-foundations`): every returned correction must
satisfy `H c = s (mod 2)`, and DEM weights follow the
reference manual.

## Library-First Boundary

The bundled library MCP server accepts registered code
families, binary syndromes, and binary parity-check matrices
through its **eight documented tools**. It does **not** accept
arbitrary `.stim` files or DEM objects. Use
`qector-library.list_code_families` and
`qector-library.build_code_from_matrix` for the supported
app-free path.

The companion **bench server** adds:

- `qector-research.code_family_info` (introspect a code)
- `qector-research.code_export_matrices` (export H, logicals, c2q)
- `qector-research.code_logicals_inspect` (logical coset status)
- `qector-research.dem_inspect` (parse a minimal Stim-style DEM)
- `qector-research.dem_collapse_parallel` (apply manual 14.1 rule)
- `qector-research.hardware_probe` (CUDA / OpenCL / license)
- `qector-research.license_active_check` (tier + max_distance)
- `qector-research.env_block` (manual 22.3 environment block)
- `qector-research.artifact_metadata_check` (chapter 22.3 block)

## Optional DEM Workflow (manual 14, 16.4)

The direct wheel may expose a `dem` module; Stim may be
installed separately. Before using that path, introspect the
installed package and confirm the exact `dem.from_stim`,
graph-collapse, and decoder APIs. Do not assume that optional
surfaces are available because a Workbench guide names them.

For an optional Workbench, inspect `initialize` and
`tools/list` on the target device first. Use only the
negotiated names and schemas; no Workbench tool is a contract
of this package.

DEM edge weights follow `log((1-p)/p)`. Hyperedges require a
decoder whose documented contract supports the input
structure; do not route by an invented tool name.

## Architecture mapping (manual 4)

- **Superconducting square-lattice**:
  `heavy_hex` or `rotated_surface` (the graphlike rotated
  surface code with weight-4 plaquettes plus weight-2
  boundary checks).
- **Dense-connectivity experiments**: use a qLDPC family and
  decoder only when the active direct-wheel API or target
  Workbench `tools/list` confirms them. The library
  `codes.hypergraph_product(A, B)`,
  `codes.bicycle_code(...)`, and
  `codes.bivariate_bicycle_code(...)` are the qLDPC
  factories; the matching decoders reject them - route to
  `BPOSDDecoder`.
- **Surface / topological**: `rotated_surface` (graphlike,
  one logical) or `toric` (two logicals).
- **Color codes**: `color_code` (k=2 on the planar
  triangular 6.6.6 C2).
- **Verify with the library `list_code_families`** or the
  bench `code_family_info`. Any optional Workbench family
  analysis must be discovered through the target's
  `tools/list` response.

## Detector Error Models (manual 14, 12.1)

- Optional direct-wheel path: `from qector_decoder_v3 import
  dem` with Stim installed separately; use `from_stim`,
  `collapse_to_graph`, and `make_decoder('blossom')` only
  after introspection confirms those APIs.
- Any Workbench Stim / DEM path is optional and
  device-local; use only names from that target's
  `tools/list` response.
- Two-stage CSS DEM path (manual 12.1): parse the X DEM
  and Z DEM, run X decode, compute
  `s'_Z = s_Z + H_{Z,X} c_X`, run Z decode, XOR the
  corrections. Theorem 13 guarantees joint faithfulness.

## Hardware Honesty

- `cuda_is_available()` and any direct-wheel GPU
  availability method report hardware, not license
  entitlement.
- The bench server `qector-research.hardware_probe` reports
  the live CUDA / OpenCL state plus the live license
  tier; do not hard-code a value from another machine.
- `qector-research.license_active_check` returns the offline
  tier (`Community` / `Pro` / `Enterprise`) and the
  `max_distance` cap. The Community cap is `d <= 7`, the
  Pro cap is `d <= 19`, the Enterprise cap is `d <= 63`.
- Workbench hardware tools are optional and device-local.
- GPU / OpenCL behavior must be tested on the target
  device; no bundled hardware result is evidence.
- GPU / CPU bit identity is a scoped theorem obligation
  (Theorem 16), not a portable performance claim.

## Deliverables

Provide a runnable local circuit-to-decode workflow with
exact inputs, decoder options, seeds, package versions,
environment metadata, syndrome validation, and an external
artifact SHA-256 sidecar. Keep generated artifacts outside
the public plugin tree.

The bench server's `artifact_metadata_check` and
`artifacts_sha256` are the chapter 22.3 helpers; the
library's `threshold_sweep` already emits the metadata block
plus the SHA-256 sidecar.