# Risc V

> RISC-V instruction set architecture and processor implementation

- Skill: `neuralblitz/risc-v` (Agent Skill)
- Install (CLI): `npx skillmds@latest add neuralblitz/risc-v`
- Raw SKILL.md: https://api.skillmd.com/api/skills/neuralblitz/risc-v/raw
- Safety review: pending
- Works with: Claude Code, Claude.ai, OpenAI Codex
- Category: Coding & Dev Tools
- License: MIT
- Author: NeuralBlitz (https://skillmd.com/u/neuralblitz)
- Updated: 2026-09-17
- Page: https://skillmd.com/skills/neuralblitz/risc-v

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## What I do
- Work with RISC-V ISA
- Design RISC-V processors
- Implement custom extensions
- Verify RISC-V implementations

## When to use me
When working on RISC-V processors or open-source hardware.

## Key Concepts
- RISC-V instruction formats
- Base and extension ISA
- Privilege modes
- RISC-V privileged spec
- Rocket Chip
- SiFive cores
- Custom extensions