Low Level Dev Skills
Low Level Dev Skills from mohitmishra786/low-level-dev-skills.
Skills in this plugin
135- ▌ Assembly Riscv · mohitmishra786 bundleRISC-V assembly skill for RV32/RV64 programming. Use when working with the RISC-V ISA, calling conventions (psABI), inline assembly with GCC/Clang, understanding extension naming (IMAFD), compressed instructions, or simulating RISC-V with QEMU and GDB remote debugging. Activates on queries about RISC-V assembly, RV32, RV64, RISC-V calling convention, RISC-V inline asm, RISC-V extensions, QEMU RISC-V, or RISC-V GDB.
- ▌ Cpp Coroutines · mohitmishra786C++20 coroutines skill for understanding coroutine mechanics and debugging. Use when working with co_await, co_yield, co_return, implementing promise_type, understanding coroutine frame layout, debugging suspended coroutines in GDB, or inspecting frame allocation with Compiler Explorer. Activates on queries about C++20 coroutines, co_await, co_yield, promise_type, coroutine_handle, coroutine suspension, or coroutine frame.
- ▌ Llvm Ir And Passes · mohitmishra786LLVM IR and passes skill for reading compiler IR. Use when analyzing LLVM IR, understanding SSA, pass pipeline order, or running opt on bitcode. Activates on queries about LLVM IR, SSA form, opt passes, llvm-dis, pass pipeline, or reading .ll files.
- ▌ Simd Intrinsics · mohitmishra786 bundleSIMD intrinsics skill for x86 (SSE/AVX) and ARM (NEON) vectorization. Use when reading auto-vectorization reports, writing SSE2/AVX2/NEON intrinsics, checking CPU feature flags at runtime, choosing between compiler builtins and raw intrinsics, or diagnosing why auto-vectorization failed. Activates on queries about SIMD, SSE2, AVX2, NEON, intrinsics, -fopt-info-vec, auto-vectorization, or vectorization failures.
- ▌ Qemu For Kernel Development · mohitmishra786QEMU kernel development skill for driver and kernel testing. Use when booting custom kernels in QEMU, Buildroot/Yocto rootfs, virtio devices, or NFS root for driver iteration. Activates on queries about QEMU kernel dev, Buildroot QEMU, virtio block, kernel module test QEMU, or -append root=
- ▌ Datasheet And Refmanual Reading · mohitmishra786Datasheet and reference manual reading skill for embedded engineers. Use when extracting pinouts, electrical limits, register maps, clock trees, or timing from MCU documentation. Activates on queries about reading STM32 RM, extracting register bits, finding errata, or navigating reference manual sections.
- ▌ Linux Kernel Modules · mohitmishra786 bundleLinux kernel module skill for writing and debugging loadable kernel modules. Use when writing LKMs with Kbuild, adding module parameters, creating /proc and sysfs entries, implementing character devices, debugging with KGDB or ftrace, or handling module signing for Secure Boot. Activates on queries about Linux kernel modules, loadable modules, Kbuild, module parameters, /proc filesystem, sysfs, character devices, KGDB, or module signing.
- ▌ Interrupts And Exceptions Baremetal · mohitmishra786Bare-metal interrupt and exception skill for Cortex-M NVIC. Use when writing ISRs, configuring priorities, handling HardFault, or measuring interrupt latency. Activates on queries about NVIC, ISR, vector table, HardFault, tail-chaining, or interrupt priority.
- ▌ Compiler Optimizations Deep · mohitmishra786Deep compiler optimizations skill for RA, ISel, and PGO. Use when explaining register allocation, instruction selection, LICM, vectorization limits, or profile-guided optimization beyond -O3. Activates on queries about register allocation, instruction selection, LICM, auto-vectorization failure, PGO, or BOLT.
- ▌ Code Generation And Backends · mohitmishra786Code generation and backends skill for LLVM targets. Use when explaining instruction selection, DAG legalization, target lowering, or adding backend support overview. Activates on queries about LLVM backend, instruction selection, target lowering, llc, TableGen, or codegen pipeline.
- ▌ Cpu Pipelines And Hazards · mohitmishra786CPU pipeline skill for hazards, forwarding, and stalls. Use when explaining pipeline stages, data/control hazards, forwarding paths, or branch stalls in performance analysis. Activates on queries about pipeline hazard, data hazard, control hazard, forwarding, pipeline stall, or superscalar basics.
- ▌ Abi And Calling Conventions · mohitmishra786ABI and calling conventions skill for cross-language boundaries. Use when explaining System V AMD64, ARM AAPCS, RISC-V psABI, stack frames, variadic calls, or FFI register rules. Activates on queries about calling convention, ABI, System V AMD64, AAPCS, stack frame, variadic function, or FFI registers.
- ▌ Memory Hierarchy And Caches · mohitmishra786Memory hierarchy skill for caches, coherence, and locality. Use when explaining cache levels, associativity, false sharing, prefetching, or MESI coherence. Activates on queries about cache hierarchy, L1 L2 L3, false sharing, cache line, prefetch, or cache coherence.
- ▌ Virtual Memory Paging And Tlb · mohitmishra786Virtual memory skill for paging, page tables, and TLB. Use when explaining page faults, multi-level page tables, TLB behavior, or virtual vs physical addressing. Activates on queries about virtual memory, page table, TLB, page fault, mmap paging, or x86-64 paging.
- ▌ Branch Prediction And Speculation · mohitmishra786Branch prediction and speculation skill for CPU security and performance. Use when explaining branch predictors, mispredict penalties, speculative execution, Spectre/Meltdown mitigations, or branchless patterns. Activates on queries about branch prediction, speculative execution, Spectre, Meltdown, mispredict, or branchless code.