How do I install the Jtag Swd Debug skill?

Run npx skillmds@latest add a5c-ai/jtag-swd-debug in your terminal (requires Node.js), paste this page's agent-chat prompt into Claude, Cursor, or any MCP-connected agent, or download the SKILL.md file and copy it into your agent's skills directory.

Is Jtag Swd Debug safe to use?

This skill has not completed SkillMD's automated safety review yet. Independent scanners report: SkillSpector: PASS, Skill Scanner: PASS. Capability flags: docs only. SkillMD never runs a skill's scripts for you; review the SKILL.md before installing.

Which AI agents work with Jtag Swd Debug?

This skill is tagged as working with Claude Code, Claude.ai, OpenAI Codex. SKILL.md is an open format, so most agents that read a skills directory can load it too.

Is Jtag Swd Debug free to use?

Yes. Installing skills from SkillMD is free, and the skill stays under its author's original license.

Who published Jtag Swd Debug?

a5c-ai (@a5c-ai) published this skill. Their other Agent Skills are listed on their SkillMD profile.

Jtag Swd Debug by a5c-ai — Agent Skill

Name: Jtag Swd Debug
Rating: 4.2 (5 reviews)
Author: a5c-ai

File contents

JTAG/SWD Debug Skill

Overview

This skill provides deep integration with JTAG/SWD debug probes for hardware-level debugging, flash programming, and real-time firmware analysis. It enables direct hardware interaction through industry-standard debug interfaces.

Capabilities

Debug Probe Operations

Execute OpenOCD, J-Link, and ST-LINK commands
Configure debug probe connections and interfaces
Manage multiple debug probe types and adapters
Handle transport protocols (JTAG, SWD, cJTAG)

Memory Operations

Read/write memory-mapped registers
Direct memory inspection and modification
Real-time memory watch and modification
Flash programming and verification
Memory dump and analysis

Debugging Features

Set hardware breakpoints and watchpoints
Core state inspection (registers, stack, PC)
Single-step execution control
Fault handler analysis and debugging
Call stack unwinding

Trace and Output

Semihosting input/output support
SWO trace output configuration
ITM stimulus port configuration
Real-time trace buffer analysis

Target Processes

hardware-bring-up.js - Initial board validation and debug setup
bootloader-implementation.js - Bootloader debugging and flash operations
device-driver-development.js - Driver debugging with hardware access
field-diagnostics.js - Field debugging and analysis

Dependencies

OpenOCD (Open On-Chip Debugger)
J-Link software (Segger)
ST-LINK utilities (STMicroelectronics)
Debug probe hardware (J-Link, ST-LINK, CMSIS-DAP)

Usage Context

This skill is invoked when tasks require:

Direct hardware debugging through JTAG/SWD
Flash memory programming operations
Low-level register and memory inspection
Fault analysis and crash debugging
Hardware breakpoint management

Configuration

debug_probe:
  type: jlink | stlink | openocd | cmsis-dap
  interface: swd | jtag
  speed: 4000  # kHz
  target: cortex-m4 | cortex-m7 | etc.

Example Operations

Flash Programming

openocd -f interface/stlink.cfg -f target/stm32f4x.cfg \
  -c "program firmware.elf verify reset exit"

Memory Read

JLinkExe -device STM32F407VG -if SWD -speed 4000 \
  -CommanderScript read_memory.jlink

Register Inspection

openocd -f board/stm32f4discovery.cfg \
  -c "init; halt; reg; resume; exit"

---name: jtag-swd-debugdescription: Deep integration with JTAG/SWD debug probes for hardware-level debugging and flash programming--- # JTAG/SWD Debug Skill ## Overview This skill provides deep integration with JTAG/SWD debug probes for hardware-level debugging, flash programming, and real-time firmware analysis. It enables direct hardware interaction through industry-standard debug interfaces. ## Capabilities ### Debug Probe Operations - Execute OpenOCD, J-Link, and ST-LINK commands - Configure debug probe connections and interfaces - Manage multiple debug probe types and adapters - Handle transport protocols (JTAG, SWD, cJTAG) ### Memory Operations - Read/write memory-mapped registers - Direct memory inspection and modification - Real-time memory watch and modification - Flash programming and verification - Memory dump and analysis ### Debugging Features - Set hardware breakpoints and watchpoints - Core state inspection (registers, stack, PC) - Single-step execution control - Fault handler analysis and debugging - Call stack unwinding ### Trace and Output - Semihosting input/output support - SWO trace output configuration - ITM stimulus port configuration - Real-time trace buffer analysis ## Target Processes - `hardware-bring-up.js` - Initial board validation and debug setup - `bootloader-implementation.js` - Bootloader debugging and flash operations - `device-driver-development.js` - Driver debugging with hardware access - `field-diagnostics.js` - Field debugging and analysis ## Dependencies - OpenOCD (Open On-Chip Debugger) - J-Link software (Segger) - ST-LINK utilities (STMicroelectronics) - Debug probe hardware (J-Link, ST-LINK, CMSIS-DAP) ## Usage Context This skill is invoked when tasks require: - Direct hardware debugging through JTAG/SWD - Flash memory programming operations - Low-level register and memory inspection - Fault analysis and crash debugging - Hardware breakpoint management ## Configuration ```yaml debug_probe: type: jlink | stlink | openocd | cmsis-dap interface: swd | jtag speed: 4000 # kHz target: cortex-m4 | cortex-m7 | etc. ``` ## Example Operations ### Flash Programming ```bash openocd -f interface/stlink.cfg -f target/stm32f4x.cfg \ -c "program firmware.elf verify reset exit" ``` ### Memory Read ```bash JLinkExe -device STM32F407VG -if SWD -speed 4000 \ -CommanderScript read_memory.jlink ``` ### Register Inspection ```bash openocd -f board/stm32f4discovery.cfg \ -c "init; halt; reg; resume; exit" ```

Frequently asked questions

Jtag Swd Debug