Embedded Debugger
Use the local embedded-debugger-mcp binary as the source of truth. Prefer CLI
checks first, then MCP tools when an MCP client is available.
Entry Decision
- If the user has an MCP client configured, start or verify the server:
embedded-debugger-mcp serve
- If the user wants no MCP install, use CLI-first mode:
embedded-debugger-mcp doctor, embedded-debugger-mcp probes list, and
embedded-debugger-mcp skill print-prompt.
- If hardware access is required, confirm the probe and target are connected
before destructive actions such as flash erase or program.
CLI Workflow
Run these in order and report the exact outcome:
embedded-debugger-mcp doctor
embedded-debugger-mcp probes list
embedded-debugger-mcp config show
Use JSON for automation:
embedded-debugger-mcp doctor --json
embedded-debugger-mcp probes list --json
Backends
One tool set runs over two interchangeable engines, chosen at connect:
backend: "probe-rs" (default) — native probe-rs; supports flash and RTT.
backend: "openocd" (experimental) — talks to an already-running openocd
over its GDB port via openocd_address (default 127.0.0.1:3333). Use for
chips probe-rs does not cover well (e.g. Xtensa ESP32 via openocd-esp32).
Memory access and halt/run/step/reset are validated on real ESP32-S3; flash
and RTT are not available on this backend. Register reads currently use ARM
gdb register numbers, so PC/SP are wrong on Xtensa (known limitation).
diagnose_fault and unwind_exception are Cortex-M specific and do not
apply to Xtensa targets.
- Start openocd with
gdb_memory_map disable, otherwise it probes flash on
the GDB connect, fails, and REJECTS the connection. Example:
openocd -f board/esp32s3-builtin.cfg -c "gdb_memory_map disable".
The AI uses the same tools regardless of backend; only connect differs.
MCP Workflow
Use MCP tools for session-based operations:
list_probes
connect (add backend: "openocd" and openocd_address to use OpenOCD)
- Read-only checks such as
probe_info, get_status, and read_memory
- On a crash or halt, call
diagnose_fault: it reads the Cortex-M SCB fault
registers (CFSR/HFSR/MMFAR/BFAR/SHCSR/CPUID) plus PC/SP/LR and returns a
compact structured evidence bundle in one call. Halt the target first for
meaningful values; reason over the set fault bits yourself. Then call
unwind_exception with elf_path to map the crash to a source line
(full DWARF backtrace on probe-rs; faulting PC/LR on OpenOCD).
- Mutating operations only after the user confirms target, file path, and risk:
write_memory, flash_erase, flash_program, run_firmware (probe-rs)
- RTT operations after firmware is running:
rtt_attach, rtt_channels,
rtt_read, rtt_write, rtt_detach (probe-rs)
disconnect
Fetch authoritative info yourself
You are a capable model: prefer fetching ground truth over relying on memorized
or hardcoded chip data. This skill points you to sources; it does not embed
register tables. In order of authority:
- The target itself (runtime, most authoritative for this exact chip):
registers are self-described by the GDB target description; memory is read
with
read_memory; core identity from CPUID / the connected target.
- The firmware ELF (what is actually running): symbols and source lines come
from DWARF — use
unwind_exception (pass elf_path) to map addresses to
file:line.
- The chip datasheet / reference manual (external, per-chip): for a peripheral
or fault register, find the peripheral's base in the memory-map chapter, add
the register offset, then
read_memory. Search the vendor document for the
exact value; do not guess addresses from memory. CMSIS-SVD files are a
machine-readable source for register maps.
- ARM Cortex-M architecture registers (SCB fault regs, CPUID) are fixed by the
ARM architecture and identical across vendors —
diagnose_fault reads them.
They do not exist on non-Cortex-M targets (e.g. Xtensa ESP32).
Do not hardcode or invent register/peripheral addresses. If a value is not
recoverable from the target, the ELF, or a cited datasheet, say so.
Know your versions
Behavior and target support depend on tool versions — check them before
concluding something is unsupported or broken:
- probe-rs version determines which chips and architectures are supported
(e.g. Xtensa support is comparatively new). Check
embedded-debugger-mcp doctor.
- OpenOCD version and fork matter: the Espressif fork (openocd-esp32) is needed
for Xtensa ESP32, and some targets need flags like
gdb_memory_map disable.
Check openocd --version.
- Probe firmware (ST-Link / J-Link) can affect connectivity;
probes list
reports the connected probe.
Safety Rules
- Treat flash erase, flash program, memory write, reset, run, and RTT write as
mutating hardware operations.
- Prefer read-only discovery before mutation.
- Respect project configuration limits for file paths, file sizes, memory
ranges, and flash erase permissions.
- Do not claim hardware success from command text alone; cite the command or MCP
tool result that produced the evidence.
Prompt Reference
For a reusable CLI+Skill prompt, read
references/default-prompt.md.
1---2name: embedded-debugger3description: Embedded hardware debugging workflow for probe-rs targets using embedded-debugger-mcp. Use when Codex or Claude Code needs to inspect debug probes, validate embedded debugger setup, start the MCP server, guide a user through ARM Cortex-M/RISC-V flashing/debugging/RTT workflows, or operate without installing an MCP client by using the CLI plus prompts.4---56# Embedded Debugger78Use the local `embedded-debugger-mcp` binary as the source of truth. Prefer CLI9checks first, then MCP tools when an MCP client is available.1011## Entry Decision12131. If the user has an MCP client configured, start or verify the server:14 `embedded-debugger-mcp serve`152. If the user wants no MCP install, use CLI-first mode:16 `embedded-debugger-mcp doctor`, `embedded-debugger-mcp probes list`, and17 `embedded-debugger-mcp skill print-prompt`.183. If hardware access is required, confirm the probe and target are connected19 before destructive actions such as flash erase or program.2021## CLI Workflow2223Run these in order and report the exact outcome:2425```bash26embedded-debugger-mcp doctor27embedded-debugger-mcp probes list28embedded-debugger-mcp config show29```3031Use JSON for automation:3233```bash34embedded-debugger-mcp doctor --json35embedded-debugger-mcp probes list --json36```3738## Backends3940One tool set runs over two interchangeable engines, chosen at `connect`:4142- `backend: "probe-rs"` (default) — native probe-rs; supports flash and RTT.43- `backend: "openocd"` (experimental) — talks to an already-running `openocd`44 over its GDB port via `openocd_address` (default `127.0.0.1:3333`). Use for45 chips probe-rs does not cover well (e.g. Xtensa ESP32 via openocd-esp32).46 Memory access and halt/run/step/reset are validated on real ESP32-S3; flash47 and RTT are not available on this backend. Register reads currently use ARM48 gdb register numbers, so PC/SP are wrong on Xtensa (known limitation).49 `diagnose_fault` and `unwind_exception` are Cortex-M specific and do not50 apply to Xtensa targets.51 - Start openocd with `gdb_memory_map disable`, otherwise it probes flash on52 the GDB connect, fails, and REJECTS the connection. Example:53 `openocd -f board/esp32s3-builtin.cfg -c "gdb_memory_map disable"`.5455The AI uses the same tools regardless of backend; only `connect` differs.5657## MCP Workflow5859Use MCP tools for session-based operations:60611. `list_probes`622. `connect` (add `backend: "openocd"` and `openocd_address` to use OpenOCD)633. Read-only checks such as `probe_info`, `get_status`, and `read_memory`644. On a crash or halt, call `diagnose_fault`: it reads the Cortex-M SCB fault65 registers (CFSR/HFSR/MMFAR/BFAR/SHCSR/CPUID) plus PC/SP/LR and returns a66 compact structured evidence bundle in one call. Halt the target first for67 meaningful values; reason over the set fault bits yourself. Then call68 `unwind_exception` with `elf_path` to map the crash to a source line69 (full DWARF backtrace on probe-rs; faulting PC/LR on OpenOCD).705. Mutating operations only after the user confirms target, file path, and risk:71 `write_memory`, `flash_erase`, `flash_program`, `run_firmware` (probe-rs)726. RTT operations after firmware is running: `rtt_attach`, `rtt_channels`,73 `rtt_read`, `rtt_write`, `rtt_detach` (probe-rs)747. `disconnect`7576## Fetch authoritative info yourself7778You are a capable model: prefer fetching ground truth over relying on memorized79or hardcoded chip data. This skill points you to sources; it does not embed80register tables. In order of authority:81821. The target itself (runtime, most authoritative for this exact chip):83 registers are self-described by the GDB target description; memory is read84 with `read_memory`; core identity from CPUID / the connected target.852. The firmware ELF (what is actually running): symbols and source lines come86 from DWARF — use `unwind_exception` (pass `elf_path`) to map addresses to87 `file:line`.883. The chip datasheet / reference manual (external, per-chip): for a peripheral89 or fault register, find the peripheral's base in the memory-map chapter, add90 the register offset, then `read_memory`. Search the vendor document for the91 exact value; do not guess addresses from memory. CMSIS-SVD files are a92 machine-readable source for register maps.934. ARM Cortex-M architecture registers (SCB fault regs, CPUID) are fixed by the94 ARM architecture and identical across vendors — `diagnose_fault` reads them.95 They do not exist on non-Cortex-M targets (e.g. Xtensa ESP32).9697Do not hardcode or invent register/peripheral addresses. If a value is not98recoverable from the target, the ELF, or a cited datasheet, say so.99100## Know your versions101102Behavior and target support depend on tool versions — check them before103concluding something is unsupported or broken:104105- probe-rs version determines which chips and architectures are supported106 (e.g. Xtensa support is comparatively new). Check `embedded-debugger-mcp doctor`.107- OpenOCD version and fork matter: the Espressif fork (openocd-esp32) is needed108 for Xtensa ESP32, and some targets need flags like `gdb_memory_map disable`.109 Check `openocd --version`.110- Probe firmware (ST-Link / J-Link) can affect connectivity; `probes list`111 reports the connected probe.112113## Safety Rules114115- Treat flash erase, flash program, memory write, reset, run, and RTT write as116 mutating hardware operations.117- Prefer read-only discovery before mutation.118- Respect project configuration limits for file paths, file sizes, memory119 ranges, and flash erase permissions.120- Do not claim hardware success from command text alone; cite the command or MCP121 tool result that produced the evidence.122123## Prompt Reference124125For a reusable CLI+Skill prompt, read126`references/default-prompt.md`.