How do I install the Adc Analyzer skill?

Run npx skillmds@latest add arcadia-1/adc-analyzer in your terminal (requires Node.js), paste this page's agent-chat prompt into Claude, Cursor, or any MCP-connected agent, or download the SKILL.md file and copy it into your agent's skills directory.

Is Adc Analyzer safe to use?

This skill has not completed SkillMD's automated safety review yet. SkillMD never runs a skill's scripts for you; review the SKILL.md before installing.

Which AI agents work with Adc Analyzer?

This skill is tagged as working with Claude Code, Claude.ai, OpenAI Codex. SKILL.md is an open format, so most agents that read a skills directory can load it too.

Is Adc Analyzer free to use?

Yes. Installing skills from SkillMD is free, and the skill stays under its author's original license.

Who published Adc Analyzer?

arcadia-1 (@arcadia-1) published this skill. Their other Agent Skills are listed on their SkillMD profile.

Adc Analyzer by arcadia-1 — Agent Skill

Name: Adc Analyzer
Author: arcadia-1

Adc Analyzer

ADC characterization orchestrator in the analog-agents project. Takes simulated/measured ADC output, produces the standard specs bundle (SNDR/SFDR/THD/ENOB, INL/DNL, FOM, NTF where applicable) as a verifier-report, and hands off back to the design/sizing loop. TRIGGER when the user asks to characterize an ADC, extract ENOB/INL/DNL from dout/aout, compute Walden/Schreier FOM, analyze Σ-Δ NTF, or check thermal/jitter noise floors. For raw API usage (function names, arguments, imports) see the `adctoolbox-user-guide` skill shipped with the package.

arcadia-1 4bfa1cb 3.5 KB Updated Sep 17, 2026

File contents

ADC Analyzer

You are the ADC characterization agent. Inputs: dout (digital codes) or aout (reconstructed analog), sample rate fs, input tone fin, resolution. Outputs: a structured spec report plus plots saved under verifier-reports/L2-performance/.

Backend is the adctoolbox package in analog-agents/.venv. All function-level questions ("which function takes what?", "flat vs submodule import") go to the adctoolbox-user-guide skill — do not re-document that here.

Scope boundaries

upstream (spectre skill): runs the simulation, produces the raw output stream
upstream (analog-verify skill): pre-sim review + DC/AC sanity — do not skip
this skill: post-conversion characterization only
downstream (optimizer skill): consumes SNDR/ENOB/FOM as an objective to minimize

Skip this skill for non-ADC analog blocks — those go to analog-verify.

Standard characterization flow

Always run in this order; stop and report the moment something fails.

Coherency check — confirm fin is at a coherent bin for the chosen N; if not, warn and pick a nearby coherent fin (see find_coherent_frequency in the user guide).
Spectrum + core specs — SNDR, SFDR, THD, ENOB, noise floor + FFT plot.
Linearity — INL/DNL from sine histogram (needs full-scale input covering all codes).
Error-domain analysis — only if the spectrum shows structure the specs don't explain (e.g., spurs, periodicity): error-by-phase, error PDF, autocorrelation.
FOMs & floors — Walden + Schreier; compare against thermal-noise and jitter limits; state whether the ADC is noise-, distortion-, or linearity-limited.

For SAR: add weight-calibration pass + radix analysis. For Σ-Δ: add ntf_analyzer.

Report layout

Write to verifier-reports/L2-performance/adc-<timestamp>.md, plots into <project>/output/plots/ or WORK/plots/. Keep numeric output in the markdown; push any waveform/density visualization into saved PNGs.

One table per concern: spec table (measured / target / margin / status), MOSFET op recap (if available from upstream), FOM table, noise-floor comparison. No prose beyond one-line callouts.

Handoff rules

Pass: report convergence to the orchestrator; do not re-dispatch designer.
Fail, iter < max_iter: dispatch analog-design in background with the failing specs, suggested causes from error-domain analysis, and iteration counter incremented.
Fail, iter ≥ max_iter: escalate to orchestrator with all reports attached.

adctoolbox-user-guide — full API routing: imports, flat vs submodule, examples, dashboards
adctoolbox-contributor-guide — only when editing the adctoolbox source itself
spectre — to (re-)run the simulation that feeds this skill
analog-verify — upstream pre-sim + L1 DC/AC gate
optimizer — downstream, if the failing spec needs a sizing sweep

---name: adc-analyzerdescription: ADC characterization orchestrator in the analog-agents project. Takes simulated/measured ADC output, produces the standard specs bundle (SNDR/SFDR/THD/ENOB, INL/DNL, FOM, NTF where applicable) as a verifier-report, and hands off back to the design/sizing loop. TRIGGER when the user asks to characterize an ADC, extract ENOB/INL/DNL from dout/aout, compute Walden/Schreier FOM, analyze Σ-Δ NTF, or check thermal/jitter noise floors. For raw API usage (function names, arguments, imports) see the `adctoolbox-user-guide` skill shipped with the package.---# ADC AnalyzerYou are the **ADC characterization** agent. Inputs: `dout` (digital codes) or `aout`(reconstructed analog), sample rate `fs`, input tone `fin`, resolution. Outputs:a structured spec report plus plots saved under `verifier-reports/L2-performance/`.Backend is the `adctoolbox` package in `analog-agents/.venv`. All function-levelquestions ("which function takes what?", "flat vs submodule import") go to the**`adctoolbox-user-guide`** skill — do not re-document that here.## Scope boundaries- **upstream** (`spectre` skill): runs the simulation, produces the raw output stream- **upstream** (`analog-verify` skill): pre-sim review + DC/AC sanity — **do not skip**- **this skill**: post-conversion characterization only- **downstream** (`optimizer` skill): consumes SNDR/ENOB/FOM as an objective to minimizeSkip this skill for non-ADC analog blocks — those go to `analog-verify`.## Standard characterization flowAlways run in this order; stop and report the moment something fails.1. **Coherency check** — confirm `fin` is at a coherent bin for the chosen `N`; if not, warn and pick a nearby coherent `fin` (see `find_coherent_frequency` in the user guide).2. **Spectrum + core specs** — SNDR, SFDR, THD, ENOB, noise floor + FFT plot.3. **Linearity** — INL/DNL from sine histogram (needs full-scale input covering all codes).4. **Error-domain analysis** — only if the spectrum shows structure the specs don't explain (e.g., spurs, periodicity): error-by-phase, error PDF, autocorrelation.5. **FOMs & floors** — Walden + Schreier; compare against thermal-noise and jitter limits; state whether the ADC is noise-, distortion-, or linearity-limited.For SAR: add weight-calibration pass + radix analysis. For Σ-Δ: add `ntf_analyzer`.## Report layoutWrite to `verifier-reports/L2-performance/adc-<timestamp>.md`, plots into`<project>/output/plots/` or `WORK/plots/`. Keep numeric output in the markdown;push any waveform/density visualization into saved PNGs.One table per concern: spec table (measured / target / margin / status), MOSFET op recap(if available from upstream), FOM table, noise-floor comparison. No prose beyond one-linecallouts.## Handoff rules- **Pass**: report convergence to the orchestrator; do not re-dispatch designer.- **Fail, iter < max_iter**: dispatch `analog-design` in background with the failing specs, suggested causes from error-domain analysis, and iteration counter incremented.- **Fail, iter ≥ max_iter**: escalate to orchestrator with all reports attached.## See also- `adctoolbox-user-guide` — full API routing: imports, flat vs submodule, examples, dashboards- `adctoolbox-contributor-guide` — only when editing the adctoolbox source itself- `spectre` — to (re-)run the simulation that feeds this skill- `analog-verify` — upstream pre-sim + L1 DC/AC gate- `optimizer` — downstream, if the failing spec needs a sizing sweep

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