Rtl P3 Uarch Design

Phase 3 uArch design: maps P2 blocks to sub-blocks with clock domains, FSM/SRAM allocation, BFM validation. Use for 'uarch', 'microarchitecture', 'Phase 3'.

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babyworm/rtl-agent-team/tree/main/skills/rtl-p3-uarch-design commit 7e77f1de83

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npx skillmds@latest add babyworm/rtl-p3-uarch-design