Rtl P4 Implement

Prerequisites

Phase 3 completion required:

• At least one μArch spec in docs/phase-3-uarch/ must exist

If prerequisite is missing: WARNING — recommend running /rtl-agent-team:rtl-p3-uarch-design. Proceed with available artifacts — orchestrator will adapt scope.

Execution

Task(subagent_type="rtl-agent-team:p4-implement-orchestrator", prompt="Execute Phase 4 RTL implementation. User input: $ARGUMENTS")

Do not perform any work directly. The orchestrator agent manages module enumeration, 10-Wave sequencing, parallel task dispatch, and phase gate verification.

Compliance Notes

• After each implementation wave completes (lint + unit test), invoke compliance-checker against P1+P2+P3 iron requirements
• RTL implementation must comply with all upstream iron requirements
• Per-wave compliance ensures regressions are caught before the integration gate (W10)
• Wave 0 includes test plan generation (Step 0b) — test scenarios are derived from uarch spec before RTL implementation begins, following TDD principles.

Output

• rtl/*/*.sv — lint-clean SystemVerilog modules
• sim/*/tb_*.sv — per-module unit test testbenches
• docs/phase-4-rtl/ — Stream B design documents and implementation summary
• reviews/phase-4-rtl/ — lint reports, code review reports, and wave completion records