Verification and Testing for ASPICE
What Each Test Level Verifies Against
This is the core principle — each test level on the right side of the V verifies against its counterpart on the left side.
| Test Level | ASPICE Process | Tests Against | Doorstop Prefix | Parent |
|---|---|---|---|---|
| Unit verification | SWE.4 | Software detailed design (SWDD) | UT | SWDD |
| SW integration test | SWE.5 | Software architecture (SWARCH) | SWIT | SWARCH |
| System integration test | SYS.4 | System architecture (SYSARCH) | SYIT | SYSARCH |
| SW qualification test | SWE.6 | Software requirements (SWRS) | SWQT | SWRS |
| System qualification test | SYS.5 | System requirements (SYSRS) | SYQT | SYSRS |
Understanding this mapping is essential — a unit test that tests against requirements (rather than design) is misclassified and will confuse an assessor.
Deriving Tests from Verification Criteria
- Read each requirement from the relevant Doorstop document.
- Find its
verification_criteriaattribute (or look up WP 17-50). - Design a test that exercises exactly that criterion.
- The verification criteria define pass/fail — the test implements them.
Example flow:
SWRS001: "SOC accuracy +/-5%"
-> verification_criteria: "Simulate charge/discharge cycle, compare estimated vs reference SOC at 10 points, all within 5%."
-> SWQT001: test_swqt_soc_accuracy() implements this exact check.
Detailed References
- For WP 08-52 (test plan), WP 08-50 (test spec), and WP 13-50 (test results) detailed formats, read
references/test-artifacts.md. - For Doorstop test spec item format, link commands, regression strategy, and coverage requirements, read
references/doorstop-test-items.md. - For test framework and coverage tool table by language, read
references/technology-table.md.