Bscost Net

Plan and execute internet-assisted backside net cost modeling for signal and clock nets, then evaluate stability and correlation against HPWL baselines across multiple designs. Use when users ask to improve/validate backside cost models, choose benchmark designs, compare model vs HPWL, or prepare publishable model-evaluation evidence.

Mr-Fang-VLSI Updated

File contents

Mr-Fang-VLSI/EDAgent/tree/main/skills/bscost-net commit 927d266109

Frequently asked questions

npx skillmds@latest add mr-fang-vlsi/bscost-net