Risc V

RISC-V instruction set architecture and processor implementation

NeuralBlitz a9508eb 479 B Updated 1 repo stars

File contents

What I do

  • Work with RISC-V ISA
  • Design RISC-V processors
  • Implement custom extensions
  • Verify RISC-V implementations

When to use me

When working on RISC-V processors or open-source hardware.

Key Concepts

  • RISC-V instruction formats
  • Base and extension ISA
  • Privilege modes
  • RISC-V privileged spec
  • Rocket Chip
  • SiFive cores
  • Custom extensions

neuralblitz/mito/tree/main/.opencode/skills/risc-v commit a9508eb62b

Frequently asked questions

npx skillmds@latest add neuralblitz/risc-v