name: import
description: Import requirement documents, notes, existing RTL, or legacy YAML into ssot-gen evidence before grill-me/to-ssot. Use when the user wants to build SSOT from IP docs or existing RTL without hand-authoring the SSOT directly.
Import Evidence Into SSOT-Gen
This skill imports evidence only. The output of this step is an SSOT evidence
summary and QA backlog; the production YAML is still written later by
/to-ssot.
Rules
- SSOT remains the authority. Imported RTL, docs, spreadsheets, or legacy
YAML are evidence, not downstream artifacts to preserve blindly.
- Do not write production RTL/TB/sim files. This workflow may write only
SSOT-side notes, import manifests, QA records, and
<ip>/yaml/<ip>.ssot.yaml
when explicitly converting with /to-ssot.
- Separate known facts from guesses. Facts found in imported material can
be used directly. Conflicts or missing behavioral facts must become QA cards.
- Existing RTL is structural evidence. Extract module names, ports,
parameters, reset/clock intent, register decode hints, FSM states, memories,
and obvious protocol names. Do not infer unimplemented behavior from signal
names alone.
- Use auto-select only when enabled. In
auto-select mode, ask_user
chooses suggested/default answers and records approved QA. In normal
interactive mode, user answers are required.
Process
- Resolve the IP name from command args, active session, path names, or an
existing
<ip>/ directory. Ask once if ambiguous.
- Read each imported path:
- Markdown/text/requirements: use
read_file; for non-text docs, use
read_doc when available.
- RTL/SystemVerilog/Verilog: read top-level files and filelists first; use
grep_file/find_files for modules, ports, parameters, always blocks,
state encodings, and register address constants.
- YAML/JSON: parse as legacy SSOT/evidence when possible.
- Create or update
<ip>/req/import_manifest.json with:
- imported path list
- detected evidence type (
doc, rtl, legacy_yaml, filelist, other)
- extracted candidate facts
- conflicts and missing facts
- recommended next command (
/grill-me <ip> or /to-ssot <ip>)
- Create or update
<ip>/req/extracted_decisions.json with the same
per-decision facts and source excerpts in a compact machine-readable shape.
- Record executable handoff work in
workflow_todos.<stage>[]. Each item must
include command, script, instructions, content, detail, criteria,
and source_refs; /to-ssot consumes these as its template-backed todo
ledger.
- Record non-blocking missing decisions with
record_ssot_qa. Use ask_user
only when the import cannot determine the IP name, top module, or basic IP
type needed for the next write.
- End with
[SSOT IMPORT]:
- IP
- evidence paths read
- facts imported
- conflicts / pending QA
- next step
RTL Evidence Extraction Checklist
module declarations and top-module candidate
- parameter names/defaults
- clock/reset ports and reset polarity
- interface ports grouped by prefix/protocol
- register address constants and bitfields
- FSM state names and transition conditions
- memory/FIFO instances or arrays
- interrupt/error/debug/status signals
- comments that describe requirements
Do not treat a stub, tieoff, or placeholder module as behavioral proof.
1---2name: import3description: ---4---5---67## name: import89description: Import requirement documents, notes, existing RTL, or legacy YAML into ssot-gen evidence before grill-me/to-ssot. Use when the user wants to build SSOT from IP docs or existing RTL without hand-authoring the SSOT directly.1011# Import Evidence Into SSOT-Gen1213This skill imports evidence only. The output of this step is an SSOT evidence14summary and QA backlog; the production YAML is still written later by15`/to-ssot`.1617## Rules18191. **SSOT remains the authority.** Imported RTL, docs, spreadsheets, or legacy20 YAML are evidence, not downstream artifacts to preserve blindly.212. **Do not write production RTL/TB/sim files.** This workflow may write only22 SSOT-side notes, import manifests, QA records, and `<ip>/yaml/<ip>.ssot.yaml`23 when explicitly converting with `/to-ssot`.243. **Separate known facts from guesses.** Facts found in imported material can25 be used directly. Conflicts or missing behavioral facts must become QA cards.264. **Existing RTL is structural evidence.** Extract module names, ports,27 parameters, reset/clock intent, register decode hints, FSM states, memories,28 and obvious protocol names. Do not infer unimplemented behavior from signal29 names alone.305. **Use auto-select only when enabled.** In `auto-select` mode, `ask_user`31 chooses suggested/default answers and records approved QA. In normal32 interactive mode, user answers are required.3334## Process35361. Resolve the IP name from command args, active session, path names, or an37 existing `<ip>/` directory. Ask once if ambiguous.382. Read each imported path:39 - Markdown/text/requirements: use `read_file`; for non-text docs, use40 `read_doc` when available.41 - RTL/SystemVerilog/Verilog: read top-level files and filelists first; use42 `grep_file`/`find_files` for modules, ports, parameters, always blocks,43 state encodings, and register address constants.44 - YAML/JSON: parse as legacy SSOT/evidence when possible.453. Create or update `<ip>/req/import_manifest.json` with:46 - imported path list47 - detected evidence type (`doc`, `rtl`, `legacy_yaml`, `filelist`, `other`)48 - extracted candidate facts49 - conflicts and missing facts50 - recommended next command (`/grill-me <ip>` or `/to-ssot <ip>`)514. Create or update `<ip>/req/extracted_decisions.json` with the same52 per-decision facts and source excerpts in a compact machine-readable shape.535. Record executable handoff work in `workflow_todos.<stage>[]`. Each item must54 include `command`, `script`, `instructions`, `content`, `detail`, `criteria`,55 and `source_refs`; `/to-ssot` consumes these as its template-backed todo56 ledger.576. Record non-blocking missing decisions with `record_ssot_qa`. Use `ask_user`58 only when the import cannot determine the IP name, top module, or basic IP59 type needed for the next write.607. End with `[SSOT IMPORT]`:61 - IP62 - evidence paths read63 - facts imported64 - conflicts / pending QA65 - next step6667## RTL Evidence Extraction Checklist6869- `module` declarations and top-module candidate70- parameter names/defaults71- clock/reset ports and reset polarity72- interface ports grouped by prefix/protocol73- register address constants and bitfields74- FSM state names and transition conditions75- memory/FIFO instances or arrays76- interrupt/error/debug/status signals77- comments that describe requirements7879Do not treat a stub, tieoff, or placeholder module as behavioral proof.