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Hutch31 Tv80 Tv80

Build TV80 Chisel Code

tomevault-io Updated
Coding & Dev Tools

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Build TV80 Chisel Code

When to Use

  • Compile and build the TV80 Chisel source files
  • Generate Verilog output from Chisel RTL
  • Check for Chisel/Scala compilation errors
  • After editing any .scala file under src/

Procedure

Step 1 – Run the build

cd c:\Users\Guy\Documents\tv80
sbt "runMain tv80.tv80build"

Step 2 – Check the output

  • A successful build prints [success] at the end
  • Errors include file name, line number, and message — fix them in the relevant .scala file
  • Generated Verilog is written to the project root (or the path configured in the build main)

Notes

  • Run from the workspace root (c:\Users\Guy\Documents\tv80)
  • Requires Java and sbt on PATH
  • Chisel sources are under src/main/scala/tv80/
  • Do not modify RTL files in rtl/

Source: hutch31/tv80 — distributed by TomeVault.

tomevault-io/skills-registry/tree/main/hutch31--tv80--tv80 commit 452689da48

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npx skillmds@latest add tomevault-io/hutch31-tv80-tv80