Autonomous Refinement Loop (ARL)

Autonomous Refinement Loop (ARL)

The ARL is a logical process for iterative skill refinement that operates without human intervention by replacing judgment gates with machine-verifiable conditions.

Core loop: Assess → Plan → Implement → Review → Repeat until converged or stopped.

When to Use

Activate the ARL when:

• A skill has quality issues requiring multiple improvement passes
• Iterative refinement is needed with measurable progress tracking
• Human-out-of-loop operation is desired for bounded improvement tasks
• Assessor has identified findings that require multiple iterations to resolve
• Convergence must be tracked objectively across iterations

Prerequisites before activation: Sufficient information must be available upfront to operate the loop without runtime escalation for missing context (R1 verification required).

Prerequisites: Information Completeness Gate (R1)

Before entering the loop, verify information completeness using the RT-ICA pattern (Reverse Thinking - Information Completeness Assessment). The loop cannot start without sufficient input.

What must be present:

• Skill's stated purpose and intended use cases
• Initial assessment findings with file:line evidence
• Refinement plan with acceptance criteria
• Knowledge of downstream references (what depends on this skill)
• Quality baselines (structural inventory before changes)

What R1 checks: Classify each information need as available, derivable, or missing. Block progression if critical information is missing.

When R1 activates:

• At loop entry (iteration 0)
• At re-entry after escalation

Failure state: Loop begins with missing information, produces wrong output that must be reverted, or escalates for information that should have been captured upfront.

SOURCE: Synthesis: ARL-Applicable lines 11-32, Human-Out-of-Loop Prerequisites lines 166-177

Loop Structure

One ARL iteration follows this gate activation sequence:

R1 (info completeness) → R5 (purpose anchor) → ASSESS → R3 (validity filtering) →
R7+R2 (convergence/loop check) → PLAN → R4+R8 (quality/proportionality) →
R10 (split justification) → IMPLEMENT → R6 (content-loss) → R9 (downstream impact) → Loop

Gate timing:

• Before assessment: R1 (information sufficient?), R5 (purpose drift?)
• After assessment: R3 (findings valid?), R7 (converging?), R2 (oscillating/stalled?)
• After planning: R4 (plan sound?), R8 (changes proportional?), R10 (splits justified?)
• After implementation: R6 (content preserved?), R9 (references still valid?)

SOURCE: Synthesis: ARL-Applicable lines 260-305

The 10 Gates

SOURCE: Synthesis: ARL-Applicable — each gate documented in sections R1-R10

Exit Conditions

The loop stops when:

• Convergence (R7): Finding count reaches zero or stabilizes below value threshold
• Failure state (R2): Oscillation detected, no progress across N iterations
• Insufficient info (R1): Cannot proceed without human input
• Max iterations: Safety limit reached (prevent unbounded execution)

Escalation vs termination: R2 failure states may trigger self-correction if recoverable, or escalate with diagnosis if not. R1 gaps always escalate to request missing context.

SOURCE: Synthesis: ARL-Applicable lines 304-305

Framework Patterns

The 10 R-requirements map to existing framework mechanisms at three coverage levels:

Key insights:

• R1 (RT-ICA): SAM's RT-ICA is one-shot; ARL needs re-triggerable RT-ICA within the loop
• R2 (Loop detection): No framework detects finding-level oscillation across iterations
• R5 (Purpose anchor): GSD has deviation rules within execution; ARL needs cumulative drift detection across iterations
• R6 (Content-loss): Entirely novel — no framework compares structural inventories before/after changes
• R7 (Convergence): Entirely novel — requires cross-iteration state tracking absent from single-pass pipelines
• R8 (Proportionality): Novel comparison of finding severity vs change scope
• R10 (Split justification): Novel independent viability assessment for extracted skills

SOURCE: Synthesis: ARL-Applicable — each R-requirement section includes framework pattern table

Universal Principles

The ARL applies seven universal patterns for autonomous development systems:

1. Structure Over Instruction: Pipeline forces checks rather than asking agents to check themselves
2. Front-Loading Reduces Runtime Gates: More context captured upfront = fewer human interventions during execution
3. AI Cannot Reliably Self-Evaluate: Independent verification structurally separates producer from evaluator
4. Compression Is Architectural: Information compression works when architecture forces it, not when instructed
5. Iteration-Aware State Required: Loop control needs state persisting across iterations (convergence, oscillation, drift)
6. Parallelism Enables Independent Verification: Multiple agents checking different dimensions simultaneously reduces shared blind spots
7. Failure Paths Need More Compression: Escalation context needs better compression than success paths

Cross-reference: Synthesis: General Theory documents these patterns with evidence from 6 surveyed frameworks

References

Complete detail on each gate, framework patterns, and prerequisites:

• Synthesis: ARL-Applicable — R1-R10 mapped to framework mechanisms, loop structure
• Synthesis: General Theory — 7 universal principles for autonomous development systems
• ARL Research — Problem definition, what replaces human judgment
• Human-Out-of-Loop Prerequisites — Conditions for removing human gates
• Expert Panel Q&A — Phase 1-2 expert panel findings
• Autonomous Loop Principles — SAM extension analysis (cross-reference)