AI & ML

jiangyangcreate Skill

One-shot LLM calls against any OpenAI-compatible endpoint — chat, text summarization, and JSON outline extraction — via the etool CLI. Use when the user wants to summarize or outline text, or send a single prompt to an LLM from the command line.

draw-tree Bundle

Use whenever the user wants to analyse a stock ticker, build an investment hypothesis tree, or view a previously-committed Draw Tree. Drives the drawtree MCP server through Phase 1 (framework design, user-confirmed step by step) and Phase 2 (server-side deep research). Triggers on tickers like NVDA, 700.HK, AAPL, etc., or any mention of Draw Tree / drawtree.

arcdodo Bundle

当用户想根据一个成功案例、现有 skill 文件夹、提示词系统、工作流、工具链、项目模板或领域流程，反向分析并制作新的 Codex skill 时使用。本 skill 指导 agent 从案例中提炼可复用方法，设计精简 skill 架构，编写 SKILL.md、references、scripts、templates，设置触发描述、阶段流程、协作检查点、文件契约、唯一真相源、质量自检和反模式，避免把 skill 写成臃肿说明书。

arcdodo Bundle

当用户需要生成虚构真人角色、AI 网红、短剧角色、品牌人物、产品模特、游戏/故事 NPC、社媒头像或一组保持同一人设的人像图时使用。本 skill 指导 agent 先建立角色 brief，再生成高级肖像定脸图、表情测试图、日常生活感场景图，并逐张检查角色一致性、真实皮肤质感、毛孔细节、自然瑕疵、高级光影、非 AI 感和安全授权风险。禁止输出塑料皮肤、过度磨皮、图库感、网红滤镜感、明显 AI 生成感或未经确认的真实人物冒充图。

agirails Bundle

AI agent payment infrastructure — ACTP escrow, x402 instant payments, USDC settlement on Base L2. Interactive onboarding: asks your preferences, generates customized agent code, verifies setup. Covers provider/requester patterns, adapter routing, 8-state machine, pricing, disputes, and identity. Use when: "agirails", "ACTP", "agent payment", "agent escrow", "AI agent pay", "AI agent earn", "x402", "agent commerce", "USDC agent", "on-chain settlement", "agent-to-agent payment", "provide service", "request service", "escrow USDC", "Base L2 payment", "@agirails/sdk", "actp init", "agent economy", "ERC-8004", "agent identity"

lnc0831 Skill

Audit and resolve clock-domain-crossing (CDC) risks on a design: enumerate every clock crossing, classify each by structure (synchronizer present/absent, single-bit vs bus, async reset, reconvergence), and apply the smallest safe fix (synchronizer RTL, set_clock_groups / set_max_delay -datapath_only / set_bus_skew constraints) without ever waiving a real crossing. Invoke when the user says "cdc analysis", "check clock domain crossings", "metastability review", "are my async crossings safe", "audit clock crossings", "fix CDC violations", "report_cdc is showing critical", "do I need a synchronizer here", or asks about gray-code, handshake, async FIFO, or reset-domain-crossing (RDC) safety. Requires the SynthPilot MCP server with Vivado open and the Tcl server running (TCP:9999); CDC reporting needs an elaborated or synthesized design.

lnc0831 Skill

Produce a one-page FPGA design-health scorecard (QoR: timing, area, power, congestion, clocking, DRC/methodology). Invoke when the user asks for a "design health" check, a "QoR" report, "quality of results", a "scorecard", "how good is my design", "is this ready for signoff", or wants a single consolidated read on timing/area/power/congestion after synthesis or implementation. Requires the SynthPilot MCP server (Vivado open with the Tcl server running on TCP:9999). This is a READ-ONLY measurement-and-grading playbook: it gathers fresh tool evidence, grades each axis, and reports — it does not modify constraints, RTL, or strategy.

lnc0831 Skill

Run RTL lint / methodology checks and triage each violation into a real fix vs a justified, documented waiver. Use when the user says "lint my RTL", "code quality", "review my RTL", "check my Verilog/VHDL", "any latches / unintended latches", "clean up warnings before synthesis", "is my design lint-clean", or asks for a code-quality / methodology report on an FPGA design. Requires the SynthPilot MCP server (Xilinx Vivado running with the Tcl server connected on TCP:9999). Methodology-stage checks additionally require an open synthesized design (open_synthesized_design / open_implemented_design).

lnc0831 Skill

Bring up a behavioral (RTL) simulation end-to-end: stand up or fix a testbench, compile (xvlog/xvhdl), elaborate (xelab), run (xsim), and methodically diagnose compile errors, elaboration failures, $fatal/assertion failures, X-propagation, and hangs. Use when the user says "simulate this", "run the testbench", "set up simulation", "my sim fails / hangs / shows X", "why does my testbench not pass", "add a testbench and verify the DUT", or "debug this RTL in simulation". Requires the SynthPilot MCP server (AI -> server.py -> TCP:9999 -> tcl_server.tcl running inside an open Vivado session). This is BEHAVIORAL sim only (no gate-level/timing sim); it does NOT prove timing closure or signoff. Measure (compile log / sim log / probe) before changing anything, classify the failure, apply the smallest safe fix, then re-run.

lnc0831 Skill

Stand up a Zynq-7000 PS7-based SoC block design (Processing System bring-up). Invoke when the user says "build a zynq soc", "ps7", "zynq bring up", "add a processing system", "PS-PL design", "bring up the ARM cores", "wire AXI GP/HP to the PL", "generate the bd wrapper for a Zynq", or asks to create / configure / validate a Zynq-7000 block design (FCLK, DDR, MIO/UART/GPIO, AXI interconnect, address map, wrapper). Requires the SynthPilot MCP server (AI-driven Vivado control) with Vivado open and the tcl_server.tcl TCP bridge running, and a PRO/MAX license (Block Design tools are gated). Zynq-7000 (PS7) only — NOT Zynq UltraScale+ MPSoC (use the mpsoc skill). Stop conditions: stop and ASK on unknown hardware-critical config (DDR part / board / target FCLK on a bare part); stop and HAND OFF on timing/DRC that fails after correct constraints; declare DONE only when bd_validate_design is clean AND post-implementation report_timing_summary (setup WNS/TNS >= 0 AND hold/min-delay >= 0), check_timing (no unconstrained

tyler-r-kendrick Bundle

Use when building or consuming Model Context Protocol (MCP) servers and clients in .NET. Covers tool registration, resource providers, prompt templates, transport configuration, and integration with Microsoft.Extensions.AI. USE FOR: building MCP tool servers, consuming MCP tools from AI agents, exposing .NET functions as MCP tools, providing resources and prompts to LLM clients, integrating MCP with Semantic Kernel DO NOT USE FOR: agent-to-agent orchestration (use a2a), direct LLM API calls without tool protocols (use microsoft-extensions-ai), building REST APIs (use ASP.NET Core), ML model training (use mlnet)

lnc0831 Skill

Drive a Xilinx FPGA design end-to-end through the complete build flow: RTL -> simulation -> synthesis -> implementation -> bitstream, with a verification gate after every stage so a downstream stage never runs on an upstream stage that silently regressed. Invoke this skill when the user says "rtl to bitstream", "end to end", "full flow", "run everything", "build the whole thing", "take this design all the way to a .bit", "complete build", or asks to drive a project from source files to a programmed/exportable bitstream in one orchestrated pass. Requires the SynthPilot MCP server connected to an open Vivado session with the Tcl server (tcl_server.tcl on TCP:9999) running. This is the ORCHESTRATION playbook: it sequences the real flow tools, gates each stage on fresh tool evidence, stops on the first real failure, and hands off to the specialist skills (timing-closure, cdc-analysis, lint, simulation-debug) instead of trying to fix violations itself.

lnc0831 Skill

Close FPGA timing on a Vivado design driven by the SynthPilot MCP — iterate synthesis/implementation, diagnose critical paths, and apply the safest constraint/strategy fix until worst negative slack (WNS) and total negative slack (TNS) reach ≥ 0. Use when the user wants to close timing, fix negative WNS/TNS, resolve setup/hold violations, or asks why a design "doesn't meet timing". Requires the SynthPilot MCP (Vivado + Tcl server on :9999).

lnc0831 Skill

Measure RTL simulation code coverage (statement / branch / condition) and iteratively close it toward an explicit target by adding targeted testbench stimulus. Use when the user asks "what is my code coverage", "how much is covered", "coverage closure", "improve coverage to N%", "which lines aren't tested", "are there untested branches", or wants a sign-off-grade coverage report before tape-out / merge. Requires the SynthPilot MCP server with Vivado + the Tcl server running (xsim/xelab/xcrg, validated on Vivado 2024.2). PRO-tier tool sim_get_coverage. This is a methodology playbook, not code: it tells the AI which real SynthPilot tools to call, in what order, and how to decide what to do with the numbers.

lnc0831 Skill

Generate a bitstream and program a Xilinx FPGA over JTAG, or build an MCS image and burn it into SPI/BPI configuration flash for power-on boot. Invoke when the user says "program the board", "generate bitstream", "flash the device", "download to FPGA", "burn the flash", "load my design onto the board", "make a .mcs / .bit", or "why won't my board come up after power cycle". Covers the full hand-off from a routed implementation to live silicon: DRC + route + timing sign-off gating, .bit generation, hardware-server / JTAG connect, volatile JTAG download, and non-volatile flash programming (generate_mcs + add_flash_configuration + program_flash). Requires the SynthPilot MCP server with Vivado running and the Tcl server connected; flash / JTAG steps additionally require a physical board cabled to the host (or reachable through a remote hw_server).

lnc0831 Skill

Analyze and reduce dynamic and static power on a Xilinx Vivado design (total power, junction temperature, thermal margin). Use when the user says "reduce power", "power optimization", "lower power consumption", "power report", "report_power", "too hot / junction temp too high", "battery / thermal budget", "cut dynamic power", "static/leakage power", or asks why a design draws too much current. Requires the SynthPilot MCP server with Vivado open and the tcl_server.tcl TCP bridge running.

lnc0831 Skill

Author a correct Vivado XDC timing constraint set from scratch — primary clocks, generated (derived) clocks, input/output delays, and timing exceptions (clock groups / false paths / multicycle paths) — for a design that has no constraints yet, or whose constraints are incomplete (unconstrained ports, missing generated clocks, unrelated async clocks reported as failing paths). Invoke when the user says: "write constraints", "author xdc", "set up timing constraints", "no constraints yet", "constrain my clocks", "add input/output delays", "my clocks are asynchronous / I need clock groups", or whenever check_timing / report_timing_summary reports unconstrained clocks, ports, or combinational endpoints. This is the FIRST step before any timing-closure or signoff work — WNS/TNS numbers are meaningless until the design is correctly constrained. Requires the SynthPilot MCP server connected to an OPEN Vivado session with the Tcl server running (test_connection must pass) and a project that elaborates and synthesizes.

lnc0831 Skill

Diagnose and reduce FPGA resource/area pressure when a design is too big for the part. Use when the user says the design is "running out of LUTs", "too big for the part", "over 100% utilization", "won't fit", "out of BRAM/DSP/FF", "reduce utilization", "shrink area", "implementation failed: placement infeasible / overutilized", or asks to fit a design into a smaller/cheaper device. Requires the SynthPilot MCP server (AI-controlled Xilinx Vivado) with the Tcl server running inside an open Vivado session and a project loaded.

beixihub Bundle

Client skill for OpenClaw/ArkClaw-compatible agents to use the Beixi Niuguwang A-share/ETF paper-trading API. Use when a user asks an agent to send SMS verification, verify a code, register or bind a paper-trading account, query account status, holdings, deals, delegates, usage, resolve stock symbols or innerCode, fetch quotes, or place virtual buy/sell orders. Do not use for real-money trading; cancel orders are disabled.

hzhijun0724 Bundle

Analyze AI industry progress, current state, future scenarios, and investment implications by integrating Epoch AI, SemiAnalysis, CB Insights, Leopold Aschenbrenner, Stanford AI Index, and METR. Use when users ask about AI trends, AI progress, AGI timelines, model capability, AI infrastructure, chips, HBM, data centers, power, AI startups, enterprise adoption, AI safety, and future forecasts.

nikoxkx Skill

Designs, tests, and iterates on LLM prompts for accuracy, reliability, and performance. Use when crafting system prompts, few-shot examples, chain-of-thought prompts, or output format instructions.

nikoxkx Skill

Trains a traditional ML model (classification, regression, clustering) using scikit-learn or PyTorch. Use when building predictive models on tabular or structured data.

nikoxkx Skill

Benchmarks LLM performance on speed, cost, accuracy, and token efficiency. Use when selecting a model for a use case or comparing model versions.

nikoxkx Skill

Builds an evaluation harness to measure LLM accuracy, reliability, and performance on a task. Use when benchmarking models, comparing prompts, or tracking quality regressions.

nikoxkx Skill

Builds an LLM router that selects the right model or prompt based on task complexity, cost, or latency. Use when optimizing AI API costs or routing queries to specialized models.

nikoxkx Skill

Designs multi-step AI agent chains with tool use, planning, and error recovery. Use when building agentic systems that require planning, tool calls, or multi-turn reasoning.

nikoxkx Skill

Prepares datasets and training configurations for fine-tuning LLMs. Use when customizing a base model on domain-specific data using LoRA, QLoRA, or supervised fine-tuning.

johannesrabauer Skill

Build a first-person 3D game in FXGL — set up a player-driven Camera3D, implement mouse look, move relative to the camera facing direction, add a crosshair HUD, raycast or pick 3D targets, simulate gravity and jumping, and manage a first-person weapon or interaction model. Use this skill for FPS, first-person exploration, or first-person puzzle prototypes built on FXGL's 3D scene support.

johannesrabauer Skill

Build 3D scenes in FXGL — enable experimental 3D mode, set up Camera3D with free-look or follow-entity modes, load OBJ models via AssetLoader, spawn 3D entities with Model3D views, create built-in 3D primitives (Cuboid, Prism, Torus, Cylinder, Cone), add a six- face Skybox, animate 3D entities with AnimationBuilder, implement 3D collision with PhysicsComponent3D, build a third-person camera, and create Minecraft-style voxel worlds. Use this skill when building a 3D game, a 3D level, a first-person or third- person view, a 3D model viewer, or any JavaFX 3D scene within FXGL.

nikoxkx Skill

Creates a structured threat model for an application using STRIDE or PASTA methodology. Use when designing security into a new system or assessing an existing one.

zx1160763849-hash Bundle

Use this skill before Codex starts project reading, file edits, shell commands, dependency installation, or high-cost reasoning. It performs a read-only preflight cost route for coding and project tasks, evaluating task complexity, cost risk, context scope, model tier, reasoning effort, speed mode, permissions, staged execution, token-saving rules, and the final optimized Codex execution prompt. This skill plans and routes first; it does not execute the project task.

zx1160763849-hash Bundle

Compact-first provider-aware Codex cost router. Use before coding, file edits, project reading, tool calls, debugging, deployment, or high-cost reasoning when model/provider choice matters. It maps manually provided models to L0-L4 tiers, classifies tasks as A-E, warns about provider risk, avoids reading API keys/base_url/local credentials, never auto-fetches model lists, and defaults to concise Compact Route output.

inhai-wiki Bundle

Long-video agent workflow for analyzing videos, building timestamped content indexes, selecting highlights, creating clip plans, cutting clips with subtitles, and generating recap pages. Use when Codex is asked to turn long videos, meeting recordings, course videos, livestreams, sports or esports replays, product demos, talks, or conference recordings into highlight reels, structured reports, meeting notes, timestamped course indexes, or shareable recap packages.

waylish Bundle

Create, improve, and validate agent skills using a SkillOpt-inspired workflow: scored evidence, bounded add/delete/replace edits, validation gates, rejected-edit memory, and compact deployable SKILL.md artifacts. Trigger when the user says "write a skill", "create a Codex skill", "make a Claude skill", "turn this workflow into a skill", "optimize this skill", "improve SKILL.md", "skill quality", "best_skill.md", "use SkillOpt", "validation-gated skill", "write a skill for writing skills", "写skill", "创建Codex技能", "优化技能", "技能文档", "写一个 skill", "把流程变成skill", or provides a repeatable workflow that should become a reusable agent procedure.

tybiefh-beep Skill

self-evolving-prompt-system

konrod007 Bundle

Use when working with NoCode-X applications through MCP: inspecting workspaces/apps, APIs, data schemas, actions, JavaScript logic, templates/pages, logs, jobs, issues, media library, and builder tasks; also use for debugging, app review, documentation, and preparing precise NoCode-X builder requests.